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Preliminary Datasheet TLE6288 R
TLE 6288 R : Smart 6 Channel Peak&Hold Switch
Features
* * * 3 Channel high / low side configurable Protection Over Current (current limitation) Overtemperature Overvoltage (active clamping) Diagnosis Over Current Over Temperature Open Load (Off-State) Short to Ground (Off-state, lowside configuration) Short to Vbb (Off-state, highside configuration)
Product Summary
3 Channel high side with adjustable P&H current control
*
Supply voltage On resistance Lowside clamping voltage Highside clamping voltage Peak current range Hold current range Peak time range Fixed off time range
VS RON 1-6 Vcll (max) Vclh (max) Ipk Ihd Ip Ifo
4.5 - 5.5 V 0.15 +55 V -19 V 1.2 - 3.6 A 0.7 - 2 A 0 - 3.6 ms 100 - 400 s
*
Interface and Control 16 Bit Serial Peripheral Interface (2bit/CH) Device programming via SPI Separate diagnosis output for each CH ( DIAG1 - 6) General Fault Flag + Overtemperature Flag Direct parallel control of all channels General enable signal to control all channels simultaneously
P-DSO 36-12
Ordering Code:
* Low Quiescent Current * Compatible with 3.3V and 5V Microcontrollers * Electostatic discharge (ESD) protection of all pins
Application
* Solenoids, Relays and Resistive Loads * Fast protected Highside Switching (PWM up to >10kHz) * Peak and Hold Loads (valves, coils)
General description
The TLE6288 R is a 6-channel (150m) Smart Multichannel Switch in SPT4 Technology. The IC has embedded protection, diagnosis and configurable functions. Channel 1-3 are highside channels with integrated charge pump and can be programmed individually to do autonomous peak and hold current regulation with PWM. Channel 4-6 (also with integrated charge pump) can be configured to work as highside Switch or lowside Switch. This IC can be used to drive standard automotive loads in highside or lowside applications with switching frequencies up to 10kHz. In addition the TLE6288R can be used to drive autonomously up to 3 inductive Peak&Hold (valves, coils) loads with programmable peak and hold current values.
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Fault CLKProg IN 1 IN 6 DIAG 1 DIAG 5 DIAG 6 Overtemp. SCLK CS SI SO GND FSIN VCP Reset VDO VCC DOUT 1 SOUT 1 DOUT 2 SOUT 2 DOUT 3 / VB SOUT 3 DOUT 4 SOUT 4 DOUT 5 SOUT 5 DOUT 6 SOUT 6
Channel 1-3
Logic
Configuration Current Regulation
Highside 150 m Peak&Hold Protection Diagnosis
Channel 4 -6
Highside/ Lowside 150 m
SPI
Chargepump
Protection Diagnosis
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Preliminary Datasheet TLE6288 R
1. Block Diagram
Reset
Vcc
VDO
VCC VB Channel 3 Highside 300 m Peak&Hold Channel 2 Highside 300 m Peak&Hold Channel 1 Highside 300 m Peak&Hold Channel 4 Highside/ Lowside 300 m Channel 5 Highside/ Lowside 300 m
DOUT 3 / VB
.
Fault CLKProg IN 1 IN 2 IN 3 IN 4 IN 5 IN 6 DIAG 1
. . . . . . .
SOUT 3 DOUT 2 SOUT 2 DOUT 1 SOUT 1 DOUT 4 SOUT 4 DOUT 5 SOUT 5 DOUT 6 SOUT 6
Logic Driver Diagnosis
DIAG 5 DIAG 6 Overtemp. SCLK
Vcc
GND
.
Vcc
Channel 6 Highside/ Lowside 300 m
CS SI
.
GND
.
SPI
Vcc
Charge pump
SO
.
FSIN GND VCP
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Preliminary Datasheet TLE6288 R
2. Functional description
Block diagram will be added Channel 1..3: Only High Side Drive with Charge Pump. Current Control Default 2.4A peak and 1A hold with adjustable values by SPI Types of current control are switched by SPI. ( Refer to Fig. 1) Current regulation: Peak Current Controller with fixed Off-Time Peak Current, Peak Time, Hold Current and Off-Time can be selected by SPI to set average and ripple current for a given load Channel 4..6: Either High or Low Side Drive is configurable (by SPI) Open load detection and switch bypassed detection can be deactivated by SPI
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Preliminary Datasheet TLE6288 R
Protection: The TLE6288R has integrated protection functions1 for overload and short circuit (active current limitation), Overtemperature, ESD at all pins and overvoltage at the power outputs (zener clamping). Output Stage Control: Parallel Control and SPI Control A Boolean operation (either AND or OR) is performed on each of the parallel inputs IN 1..6 and respective SPI data bits, in order to determine the states of the respective outputs. The type of Boolean operation performed is programmed via the serial interface. Both, parallel inputs and respective SPI databits are high active. Truth table
parallel Input 0 0 1 1 SPI Bit 0 1 0 1 Output OR OFF ON ON ON Output AND OFF OFF OFF ON
IN 1...6
AND
Output Driver
OR
Serial Input bits 6 -11 of command Channels on / off
Each output is independently controlled by an output latch and a common reset line FSIN, which disables all outputs. A logic high input `data bit' turns the respective output channel ON, a logic low `data bit' turns it OFF. Overtemperature Behavior: Each channel has an overtemperature sensor and is individually protected against overtemperature. As soon as overtemperature occurs the channel is immediately turned off. In this case here are two different behavoirs of the affected channel that can be selected by SPI (for all channels generally). Autorestart: as long as the input signals of the channel remains on (e.g. parallel input high) the channel turns automatically on again after cooling down. Latching: After overtemperature shutdown the channel stays off until the this ovetemperature latch is reset by a new L H transition of the input signal. Note: These overtemperature sensors of the channels are only active if the channel is turned on. An additional overtemperature sensor is located in the logic of the device. I monitors permanently the IC temperature. As soon as the IC temperature reaches a specified level an overtemperature fault will be indicated.
1
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation.
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Preliminary Datasheet TLE6288 R
Current Regulator : Peak current control with fixed off-time Hold only : When the channel is turned on externally (SPI or parallel input) the current rises to the programmed hold current level. Then the channel is internally turned off and a timer is started for a constant off-time (e.g. 200s). After this time the channel is internally turned on again until the hold current level is reached again and so on. This regulation workes automatically until the channel is turned of externally. Peak and hold mode with minimum peak time: When the channel is turned on the current rises to the programmed peak current level. Then the channel is internally turned off, the current regulator changes to hold current values and a timer is started for a constant off-time. After this time the channel is internally turned on again until the hold current value is reached and then again turned off for the fixed off time. This regulation workes automatically until the channel is turned of externally. Peak and hold mode with programmed peak time: When the channel is turned on the current rises to the programmed peak current level. Then the channel is internally turned off and a timer is started for a constant off-time. After this time the channel is internally turned on again until the peak current value is reached and then again turned off. This works until the programmed peak time is over. Then the current regulator changes to hold current values and workes as described under "hold only". Peak Current, Peak Time, Hold Current and fixed Off-Time can be set via SPI. To avoid regulation disturbances by current transients during switching (e.g. caused by ESD capacitors at the outputs) the current regulator has a "leading edge blanking" of typical 20s in all three regulation modes. After turning on the DMOS (internally or externally) the current regulation circuit is deactivated for the first 20s. This guarantees that switching of the DMOS itself or charging of small capacitors at the output (e.g. ESD) is not disturbing the current regulation. Simplified functional block diagram:
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Preliminary Datasheet TLE6288 R
Current Waveforms of the different current control modes
Input Signal No Regulation
Ihd
Current defined only by load
Hold only
Ipk
tfo
Peak & Hold
with min. peak time
Ihd tfo tfo
Ipk
Peak and Hold
with set peak time
Ihd tp tfo
Fig.1 Current forms of the different current control modes of channel 1-3
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Preliminary Datasheet TLE6288 R
3. Pin Configuration
SOUT4 DOUT4 DOUT1 SOUT1 IN4 IN1 DIAG1 DIAG2 DIAG3 DIAG4 DIAG5 DIA6/Overtemp IN2 IN5 SOUT2 DOUT2 DOUT5 SOUT5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 SOUT6 DOUT6 SI _CS SCLK CLK Prog SO VDO VCC Reset IN6 IN3 Fault GND FSIN VCP DOUT3 SOUT3
Package: Power-P-DSO-36
0.65mm Pitch
TLE6288 R (S0999)
Pin Nr. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Name SOUT4 DOUT4 DOUT1 SOUT1 IN4 IN1 DIAG1 DIAG2 DIAG3 DIAG4 DIAG5 DIAG6/Overtemp IN2 IN5 SOUT2 DOUT2 DOUT5 SOUT5
Function Source Output CH 4 (high / low side) Drain Output CH 4 (high / low side) Drain Output CH 1(high side) Source Output CH 1 (high side) Control Input Channel 4 Control Input Channel 1 Diagnostic Output CH 1 Diagnostic Output CH 2 Diagnostic Output CH 3 Diagnostic Output CH 4 Diagnostic Output CH 5 Diagnostic Output CH 6 / Overtemp Control Input Channel 2 Control Input Channel 5 Source Output CH 2 (high side) Drain Output CH 2(high side) Drain Output CH 5 (high / low side) Source Output CH 5 (high / low side)
Pin Nr. 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
Name SOUT3 DOUT3 VCP FSIN GND Fault IN3 IN6 Reset VCC VDO SO CLKProg SCLK
CS
Function Source Output CH 3 (high side) Drain Output CH 3(high side) Charge Pump pin All Channels Enable / Disable Logic Ground General Fault Flag Control Input Channel 3 Control Input Channel 6 Reset pin (+ Standby Mode) Logic Supply Voltage (5V) Supply Pin for digital outputs SPI Serial Data Output Program pin of SPI Clock SPI Serial Clock SPI Chip Select SPI Serial Data Input Drain Output CH 6 (high / low side) Source Output CH 6 (high / low side)
SI DOUT6 SOUT6
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4. Pin description:
DOUT 1-3 - Drain of the 3 highside channels. These pins must always be connected to the same power (battery) supply line. SOUT 1-3 - Source of the three highside channels. Outputs of the highside channels where the load is connected. DOUT 4-6 - Drain pins of the three configurable channels. In highside configuration they must be connected to the same voltage as DOUT 1-3. In lowside configuration they are the output pins and connected to the load. SOUT 4-6 - Source of the three configurable channels. In highside configuration they are the outputs and connected to the load. In lowside configuration they must be connected with GND. IN 1-6 - Parallel input pins for the 6 power outputs. These pins have an internal pull down structure. GND - Logic ground pin. FSIN - Disable pin. If the FSIN pin is in a logic low state, it switches all outputs OFF. An internal pull-up structure is provided on chip. Reset - Reset pin. When the reset is low all channels are off, the internal biasing is deactivated, all internal registers are cleared and the supply-current consuption is reduced (standby mode). An internal pull-up structure is provided on chip. Fault - General Fault pin. There is a general fault pin (open drain) which shows a high to low transition as soon as an error is latched into the diagnosis register. When the diagnosis register is cleared this flag is also reset (high state). This fault indication can be used to generate a C interrupt. CLKProg - Programming pin for the SPI Clock signal. This pin can be used to configure the clock signal input of the SPI. In low state the SPI will read data at the rising clock edge and write data at the falling clock edge. In high state the SPI will read data at the falling clock edge and write data at the rising clock edge The pin has an internal pull down structure. DIAG1..5; DIAG6 / Overtemp. - Parallel diagnostic pins (push-pull) change state according to the input signal of the corresponding channel. As soon as an error occurs at the corresponding channel ( Overload and overtemperature is detected in on state and open load /switch bypass in off state) the DIAG output shows the inverted input signal. An fault is detected only if it lasts for longer than the fault filtering time. The fault information is not latched in a register. If DIAG6 is configured as Overtemperature Flag: This is a general fault pin which shows a high to low transition as soon as an overtemperature error occurs for any one of the six channels (for longer than the fault filtering time) or the IC logic. This fault indication can be used to differ between overload and overtemperature errors in one of the six channels or to detect a general IC overtemperature. VCP - Pin to connect the external capacitor of the integrated charge pump. VDO - Supply pin of the push-pull digital output drivers. This pin can be used to vary the high-state output voltage of the SO pin and the DIAG1-6 pins. VCC - Logic supply pin. This pin is used to supply the integrated circuitry.
CS - Chip Select of the SPI
SO - Signal Output of the Serial Peripheral Interface SI - Signal Input of the Serial Peripheral Interface. The pin has an internal pull down structure. SCLK - Clock Input of the Serial Peripheral Interface. The pin has an internal pull up structure (if CLKProg=L) or an pull down structure (if CLKProg=H). For more details about the SPI see Chapter 9.SPI.
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Preliminary Datasheet TLE6288 R
5. Maximum ratings
No. Parameter 1 Power Supply Voltage 1 static dynamic : 1min. 0C dynamic : Test cond. Fig.1 Power Supply Voltage 2 Continuous Drain Source Voltage (lowside configuration) Continuous Source Voltage (Highside configuration) Input Voltage Output Voltage Output Voltage Output Voltage Operating Temperature Storage Temperature Power Dissipation (Rthja= 20K/W) (Rthja= 30K/W) Reverse Current (1ms) Symbol Value VB VB VB VCC, VDO VDSL VSH VIN VOUT VOUT VCP OUT Ta Tj Tstg Pdmax -0.3 ...20 24 37 - 0.3 ... 7 40 -9 ... VB -0.3 ... VCC+ 0.3 -0.3 ... VCC+ 0.3 -0.3 ... VDO+ 0.3 VB +10 -40 ... +105 -40 ... +150 -55 ... +150 2,25 1,5 -4 2000 Unit V V V V V V V V V V C C C W Pin / Comment DOUT1-3 DOUT1-3 DOUT1-3 VCC, VDO DOUT - SOUT (channel 4-6) SOUT - GND (channel 4-6) IN1-6, Reset, FSIN, CS, SCK, SI, CLKProg Fault DIAG1-6, SO VCP ; no voltage must be applied
2 3a 3b 4 5a 5b 5c 6 7 8
9 10
Irev
A V
between DOUT andSOUT; Channel 4 to 6
11
12
ESD (Human Body Model) VESDb C= 100pF, R=1.5k Applied to all terminals 3 times ESD (Machine Model) VESDm C= 200pF, R=0 Applied to all terminals 3 times Single Switch off load Inductance
250
V
see Fig.2 Fig.2
DOUT, SOUT
37V
10 times (once/ 30sec)
added after characterisation
12V 160ms 350ms
Test cond. Fig.1
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6. Electrical Characteristics
VCC = 4.5 to 5.5 V ; Tj = - 40 C to + 150 C ; VB = 6V to 16V ; Reset = H ; VDO = VCC (unless otherwise specified) No. Parameter Sym- Condition Value Unit bol min typ max
Pin / Comment
1
1.1 1.2 1.3 1.4 1.5
Power Supply, Reset Power Supply Current 1 Power Supply Current 2 Power Supply Current 3 in Standby Mode Minimum Reset Duration Wake up time after reset Power Outputs On Resistance Forward Voltage Revers Diode Peak Current range Peak Current accuracy Hold Current range Hold Current accuracy Peak time range Peak time accuracy Fixed off Time range RDS(ON) ID =2.4A VB=10V VRDf ID = -4A Tj = 150C Ipk Ipka Ihd Ihda tp tpa tfo 100 400 100s 200s400s 30 20 Tj= 25, 150 Tj=-40 0.8 -3.6 20 Tj= 25, 150 Tj=-40 0.7 -2 15 20 350 2 1.2 -3.6 15 20 m V A % A % ms % s DOUTx - SOUTx SOUTx - DOUTx Ib Icc Icc+Ib tReset,min
Ch1-Ch6: Off Reset = L 50 Ccp = 10 nF
10 10 50
mA mA A s
DOUT1-3 VCC DOUT1-3, VCC
twakeup
5
ms
2
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9
2.10 Fixed off Time accuracy 2.11 Fixed off Time accuracy
tfoa
% %
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VCC = 4.5 to 5.5 V ; Tj = - 40 C to + 150 C ; VB = 6V to 16V ; Reset = H ; VDO = VCC (unless otherwise specified) No. Parameter Sym- Condition Value Unit bol min typ max 2.12 Output ON Delay time1 2.13 Output ON Rise time1 2.14 Output OFF Delay time1 tdON tr tdOFF Fig.3 Fig.3 Fig.3 HS- Mode LS- Mode Fig.3 Reset = L Iloff Iloff Vclh Vcll IDlim1-3 IDlim4-6 Tot Thys Referes to GND level Referes to GND level -9 40 4 3 160 10 -14 10 10 20 20 10 10 -250 500 -19 55 6 6 180 s s s s A A A V V A A C C SOUT1-6 DOUT4-6 SOUT1-6 DOUT4-6
Pin / Comment
2.15 Output OFF Fall time1 2.16 Leackage Current 2.17 Leak Current in OFF (highside configuration) 2.18 Leak Current in OFF (lowside configuration) 2.19 Output Clamp Voltage Highside Configuration 2.20 Output Clamp Voltage Lowside Configuration 2.21 Current limitation (Channel 1-3) 2.22 Current limitation (Channel 4-6) 2.23 IC Overtemp. Warning Hysteresis
tf
3
3.1 3.2 3.3 3.4 3.5 3.6 3.7
Digital Inputs Input Low Voltage Input High Voltage Input Voltage Hysteresis Input Pull Down current Input Pull Up current SPI Input Pull Down current SPI Input Pull Up current VINL VINH VINHys Ipd Ipu Ipd Ipd VIN = 5V VIN = GND VIN = 5V VIN = GND 20 20 10 10 2 100 50 50 20 20 100 100 50 50 1 V V mV A A A A all digit. inputs all digit. inputs all digit. inputs IN1-6; CLKProg Reset; FSIN SI, SCLK (CLKProg=H) CS;SCLK (CLKProg=L)
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VCC = 4.5 to 5.5 V ; Tj = - 40 C to + 150 C ; VB = 6V to 16V ; Reset = H ; VDO = VCC (unless otherwise specified) No. Parameter Sym- Condition Value Unit bol min typ max
Pin / Comment
4
4.1 4.2 4.3 4.4 4.5 4.6
Digital Outputs SO Low State Output Voltage SO High State Output Voltage DIAG Low State Output Voltage VSOL VSOH ISOL=2.5mA ISOH=-2mA IDIAGL= 50A IDIAGH= -50A Iout= 1mA Output :OFF V(fault) =5V VDO0.4V 0.4 1 VDO0.4V 0.4 0.4 V V V V V A SO SO DIAG1-6 DIAG1-6 Fault Fault
DIAG High State Output Voltage Fault Low Output Voltage Vol Fault Output leak Current Ioh
5
5.1
Diagnostic Functions Open Load Detection Voltage Open Load Detection Voltage VDS(OL) lowside configuration, Vbat=12V highside configuration, Vbat=12V Vbat=Vout= 20 12V 50 5.5 V
5.2
VDS(OL)
4.5
V
5.3 5.4 5.5 5.6 5.7
Output Open Load diagnosis Current Fault Filter Time Switch Bypass Detection Current Overload Detection Threshold (Channel 1-3) Overload Detection Threshold (Channel 4-6)
Id(OL) tf(fault) Id(SB) IDd(lim13)
100 100
500 200 250
A s A A A
4 3
6 6
IDd(lim 46)
Input Voltage tdON tdOFF
70% 30%
Output Voltage (Highside configuration) tr tf
Fig.3 : Turn on/off timings with resistive load
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VCC = 4.5 to 5.5 V ; Tj = - 40 C to + 150 C ; VB = 6V to 16V ; Reset = H ; VDO = VCC (unless otherwise specified) No. Parameter Sym Condition Value Unit bol min typ max
Pin / Comment
6
6.1 6.2 6.3 6.4 6.5
SPI Timing Serial Clock Frequency (depending on SO load) Serial Clock Period (1/fclk) Serial Clock High Time Serial Clock Low Time Enable Lead Time (falling edge of CS to falling edge of SCLK) Enable Lead Time (falling edge of CS to rising edge of SCLK) Enable Lag Time (rising edge of SCLK to rising edge of CS ) Enable Lag Time (falling edge of SCLK to rising edge of CS ) Data Setup Time (required time SI to rising of SCLK) Data Setup Time (required time SI to falling of SCLK) Data Hold Time (rising edge of SCLK to SI) Data Hold Time (falling edge of SCLK to SI) Disable Time
2
fSCK
DC 200 50 50 CLKProg=L 200
------
5 -----
MHz
tp(SCK) tSCKH tSCKL tleadL
ns ns ns ns
tleadH
CLKProg=H
200
--
--
ns
6.6
tlagL tlagH tSUL tSUH tHL tHH tDIS tdt
CLKProg=L CLKProg=H CLKProg=L CLKProg=H CLKProg=L CLKProg=H
200 200 20 20 20 20
----------
------200 --
ns ns ns ns ns ns ns ns
6.7
6.8
6.9
6.10 Transfer Delay Time
200
--
( CS high time between two accesses) 6.11 Data Valid Time CL = 50 pF to 100pF CL = 220 pF
tvalid ----120 150
ns
1)
To get the correct diagnostic information, the transfer delay time has to be extended to the maximum fault delay time tf(fault)max = 200s. Page 13 13.01.2003
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Preliminary Datasheet TLE6288 R
7 8 Diagnostics SPI
CS SCLK SI SO
detailled description of the diagnosis will be added The SPI is a Serial Peripheral Interface with 4 digital pins and an 16 bit shift register. The SPI is used to configure and program the device, turn on and off channels and to read detailled diagnostic information. 8.1 SPI Signal Description:
SPI
CS - Chip Select. The system microcontroller selects the TLE 6288 R by means of the CS pin. Whenever the pin is in a logic low state, data can be transferred from the C and vice versa. CS = H : Any signals at the SCLK and SI pins are ignored and SO is forced into a high impedance state.
LSB MSB
CS = H L :
*
SO Serial output (diagnosis) MSB first
internal logic registers
CS SI Serial input data MSB first
diagnostic information is transferred from the diagnosis register into the SPI shift register. serial input data can be clocked into the SPI shift register from then on SO changes from high impedance state to logic high or low state corresponding to the SO bits
16 bit SPI shift register
CS
* *
diagnosis register
LSB MSB
CS = L : SPI is working like a shift register. With each clock signal the state of the SI is read into the SPI shift-register and one diagnosis bit is written out of SO.
CS = L H:
* * transfer of SI bits from SPI shift register into the internal logic registers reset of diagnosis register if sent command was valid
To avoid any false clocking the serial clock input pin SCLK should be logic high state (if CKLProg=L; low state if CLKProg=H) during high to low transition of CS . SCLK - Serial Clock. The serial clock pin clocks the internal SPI shift register of the TLE 6288 R. The serial input (SI) accepts data into the input SPI shift register on the rising edge of SCLK (if CKLProg=L; falling edge if CLKProg=H) while the serial output (SO) shifts diagnostic information out of the SPI shift register on the falling edge (if CKLProg=L; rising edge if CLKProg=H) of serial clock. It is essential that the SCLK pin is in a logic high state (if CKLProg=L; low state if CLKProg=H) whenever chip select CS makes any transition. SI - Serial Input. Serial data bits are shifted in at this pin, the most significant bit (MSB) first. SI information is read in on the rising edge of SCLK (if CKLProg=L; falling edge if CLKProg=H). Input data is latched in the SPI shift register and then transferred to the internal registers of the logic. The input data consist of 16 bit, made up of 4 control bits and 12 data bits. The control word is used to program the device, to operate it in a certain mode as well as providing diagnostic information (see SPI Commands). SO - Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant bit (MSB) first. SO is in a high impedance state until the CS pin goes to a logic low state. New diagnostic data will appear at the SO pin following the falling edge of SCLK (if CKLProg=L; rising edge if CLKProg=H).
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8.2 SPI Diagnostics:
As soon as a fault occurs for longer than the fault filtering time, the fault information is latched into the diagnosis register (and the Fault pin will change from high to low state). A new error on the same channel will over-write the old error report. Serial data out pin (SO) is in a high impedance state when CS is high. If CS receives a LOW signal, all diagnosis bits can be shifted out serially. If the sent command was valid the rising edge of CS will reset the diagnosis registers (except the channel OT flag) and restart the fault filtering time. In case of an invalid command the device will ignore the data bits and the diagnosis register will not be reset at the rising CS edge.
Diagnostic Serial Data Out SO
MSB 15 14 13 12 11 10 9 8 7 6 5
Bit0 and Bit1 is always 1 4 3 2 1 0 LSB
Ch.6
Ch.5
Ch.4
Ch.3
Ch.2
Ch.1
IC Overtemperature Flag
Channel Overtemperature Flag
HH HL LH LL
Normal function Overload, Shorted Load or Overtemperature Open Load Switch Bypassed
Figure 1: Two bits per channel diagnostic feedback plus two overtemperature flags For Full Diagnosis there are two diagnostic bits per channel configured as shown in Figure 1. Diagnosis bit0 and bit1 are always set to 1. Normal function: The bit combination HH indicates that there is no fault condition, i.e. normal function. Overload, Shorted Load or Overtemperature: HL is set when the current limitation gets active, i.e. there is a overload, short to supply or overtemperature condition. The second reason for this bit combination is overtemperature of the corresponding channel. Open load: LH is set when open load is detected (in off state of the channel) Switch Bypassed: Short to GND : in lowside configuration LL is set when this condition is detected Short to Battery : in highside configuration LL is set when this condition is detected Channel Overtemperature Flag: In case of overtemperature in any output channel in on state the overtemperature Flag in the SPI diagnosis register is set (change bit 3 from 0 to 1). This Bit can be used to distinguish between Overload and Overtemperature (both HL combination) and is reset by switching OFF/ON the affected channel. In addition the DIAG6 / Ovtertemp pin is set low (if configured as Overtemp.Flag). IC Overtemperature Flag: When the IC logic tremperature exceeds typ.170 the non-latching IC Overtemperature Flag will be set in the SPI diagnosis register(change bit 2 from 0 to 1). In addition the DIAG6 / Ovtertemp pin is set low (if configured as Overtemp.Flag). 8.3 SPI Commands, Values and Parameters:
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The 16 bit SPI is used to program different IC functions and values, turn on and off the channels and to get detailled diagnosis information. Therefore 4 command bits and 12 data bits are used. The following parameters and functional behavior can be programmed by SPI: Current regulation Mode (mode) : for each of the three highside channels individually the operation mode can be set. a) "no current regulation b) Current regulation "hold only c) Current regulation "peak & hold with minimum peak time d) Current regulation "peak & hold with programmed peak time".
CS
SI SO
4 Bits Command
12 Bits Da ta
Diagnosis ( Ch. 1 to 6) + 2 Temp. Flags
SI command : 4 Command Bits program the operation mode of Channels 1 to 6. 12 Data Bits configure the device and give the input information (on or off) for Channel 1 to 6. SO diagnosis 16 bit diagnosis information (two bit per channel) of channels 1 to 6 plus two Overtemperature Flags
Peak Current (Ipk) : for each of the three highside channels individually the peak current value for P&H current regulation can be programmed. The current range is 1.2A to 3.6A. Fixed off time of the current regulator (tfo) : for each of the three highside channels (Ch1 - Ch3) individually the fixed off time for all modes with current regulation can be programmed from 100s to 400s. Hold Current (Ihd) : for each of the three highside channels(Ch1 - Ch3) individually the hold current value for P&H and hold only current regulation can be programmed. The current range is 0.7A to 2.0A Peak Time (tp) : for each of the three highside channels(Ch1 - Ch3) individually the peak time value for P&H current regulation can be programmed. The time range is 0.8ms to 3.6ms. Highside / Lowside Configuration ( H/L ) : Each of the three configurable channels (Ch4 - Ch6) can be programmed for use as Highside Switch or Lowside Switch. Open load and switch bypassed detection activated or deactivated (OL+SB) : For each of the three configurable channels(Ch4 - Ch6) the open load and switch bypassed diagnosis can be deactivated. In lowside configuration the open load and the short to GND detection can be deactivated, in highside configuration the open load and short to battery detection. Boolean Operation (OR / AND) : For all channels generally the Boolean operation of the parallel input signal and the SPI bit of the corresponding channel can be defined. Overtemperature Behavior ( R/L ) : The overtemperature behavior of the channels can be programmed by SPI. Autorestart or latching overtemperature shutdown can be selected (for all channels the same behavior). DIAG6 or Overtemperature Flag (D/F) : With this SPI bit the function of the DIAG6/Overtemp pin is defined. This output can work as diagnosis output of channel 6 or as Overtemperature Flag.
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Preliminary Datasheet TLE6288 R
8.4 SPI Commands
MSB
Command Table
No Command 1 2 3 Config. Regulator 1 Config. Regulator 2 Config. Regulator 3 14 13 12 11 10 9 8 7 6 5 4 3 2 1
LSB X X X
1 1 1
0 0 0
0 1 1
1 0 1
Mode Mode Mode
Ch. 6
Ipk Ipk Ipk
Ch. 5
H/L X X
OL+ SB
tfo tfo tfo
Ch 4
H/L X X
Ihd Ihd Ihd
all all
R/L X X X
OL+ OR/ SB AND
tp tp tp
DIAG 6 D/F X X X X X X X X X X X
4 5 6 7
Config. Ch1 - Ch6 Set all to Default Diagnosis only Channels on / off
1 1 1 1
1 0 1 1
0 0 1 0
0 0 1 1
H/L X X
OL+ SB
X X X X
X X
X X
X X
X X X
Ch6 Ch5 Ch4 Ch3 Ch2 Ch1
Legend of SPI Command Table: Mode: Operation mode of the current regulator: a) no regulation b) hold only c) peak&hold with minimum peak time d) peak&hold with programmed peak time Ipk : Peak current values 1.2A - 3.6A Ihd : Hold current values 0.7A - 2A tp : Peak time value 0.8ms - 3.6ms tfo : Fixed off time value 100s - 400s H/L : Channel 1-3 in highside or lowside configuration OL+SB : open load detection and switch bypassed detection activated or deactivated OR / AND : Boolean Operation (parallel input and corresponding SPI Bit) R/L : Autorestart or Latching overtemperature behaviour D/F : DIAG6/Overtemp pin set as Diagnosis output of channel 6 or as Overtemperature Flag Ch1-Ch6 : On / Off information of the output drivers (high active) Command description: Config. Regulator 1-3: With this command the values for for the current regulation and the functional mode of the channel is written into the internal logic registers. Config. Ch1- Ch6 : This command writes the configuration data of the three configurable channels (46) and sets the Boolean operation and overtemperature behavior of all channels. It also and sets the DIAG6/Overtemp. pin to Diagnosis of channel 6 or Overtemperature Flag. Set all to default : This command sets all internal logic registers back to default settings. Diagnosis only : When this command is sent the 12 data bits are ignored. The internal logic registers are not changed. Channels on/off : With this command the SPI bits for the ON/OFF information of the 6 Channels are set Note: Specified control words (valid commands) are executed and the diagnosis register is reset after the rising CS edge. Not specified control words are not executed (cause no function) and the diagnosis register is not reset after the CS = L H signal.
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Preliminary Datasheet TLE6288 R
8.5 Default settings for the internal logic registers: :no regulation :2.4A :1A :200s :2.8ms :OR :Restart :Diagnosis channel 6 :Highside :Yes (diagnosis active) :OFF :all 0 Mode Peak Current (Ipeak) Hold Current (Ihold) Fixed off Time (toff) Peak Time (tpeak) AND / OR Autorestart / Latch Diag6 / Temp. Fault Highside / Lowside (4-6) Open load & SB Yes/No (4-6) Channels 1-6 (ON / OFF) SPI 8.6 Mode Bit Assignment: 00 01 10 11 no current regulation hold only P&H minimum peak time P&H with programmed times : 1.2A :00 : 0.7A :00 1.8A 01 1A 01 2.4A 10 1.4A 10 300s 10 1.6 010 AND 1 Latch 1 Overtemp. Flag 1 Lowside 1 No 1 3.6A 11 2A 11 400s 11 2 011 2.4 100 2.8 101 3.2 110 3.6 [ms] 111
Peak Current (Ipk):: 2 Bits Hold Current (Ihd) 2 Bits Fixed off Time (tfo) 2 Bits Peak Time (tp) 3 Bits Boolean operation 1 Bit Overtemp. behavior 1 Bit Diag6 / Overtemp 1 Bit Highside/Lowside 1 Bit
: 100s 200s :00 01 : 0.8 : 000 : OR :0 : Restart :0 :Diag6 :0 :Highside :0 1.2 001
Open Load & SB (4-6) :Yes 1 Bit :0 Default settings are pin bold print.
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Preliminary Datasheet TLE6288 R
8.7 SPI Timing Diagrams :
Input Timing Diagram (CLKProg = L)
CS
0.7Vcc 0.2 Vcc
tdt tSCKH tlagL
0.7Vcc
SCLK
tleadL tSUL tHL tSCKL
0.7Vcc
0.2Vcc
SI
0.2Vcc
SO Valid Time Waveforms (CLKProg = L)
Enable and Disable Time Waveforms
SCLK tvalid
0.2 Vcc
CS
0.2 Vcc
tDis SO SO
0.7 Vcc 0.2 Vcc 0.7 Vcc 0.2 Vcc
SO
CS SCLK
4 control bit 12 data bit word 12 11 11 10 10 9 9 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 0
SI SO
Co
nt 14
rol 13
MSB
15
LSB
0
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Preliminary Datasheet TLE6288 R
Input Timing Diagram (CLKProg = H)
CS
0.7Vcc
0.2 Vcc tSCKH tleadH tlagH
0.7Vcc 0.2Vcc
tdt
SCLK
tSUH tSCKL tHH
0.7Vcc 0.2Vcc
SI
SO Valid Time Waveforms (CLKProg = H)
Enable and Disable Time Waveforms
0.7 V cc
SCLK t valid
CS
0.2 V cc
t Dis SO SO
0.7 V cc 0.2 V cc 0.7 V cc 0.2 V cc
SO
CS SCLK
4 control bit 12 data bit rol 13 word 12 11 11 10 10 9 9 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 0
SI SO
Co
nt 14
MSB
15
LSB
0
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Preliminary Datasheet TLE6288 R
9
9.1
Typicel Characteristics
Zth Diagramm
10
.
Conditions: Rth = 3.1 K/W D = 0.50
1 Zth [K/W]
Tcase = 125C Single Channel Operation
0.20 0.10 0.05 0.02 single
Parameters: tp ..... Pulse Width D ..... Duty Cycle
0.1
0.01 5 1 . 10
1 . 10
4
3 1 . 10 tp [s]
0.01
0.1
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Preliminary Datasheet TLE6288 R
10 Package
(all dimensions in mm)
P-DSO 36-12
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Preliminary Datasheet TLE6288 R
Published by Infineon Technologies AG, Bereichs Kommunikation St.-Martin-Strasse 76, D-81541 Munchen (c) Infineon Technologies AG 1999 All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
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